KVR13S9S8K2 / 8
8GB (4GB 1Rx8 512M x 64-Bit x 2 pcs.)
PC3-10600 CL9 204-Pin SODIMM Kit

DESCRIPTION
ValueRAM's KVR13S9S8K2 / 8 is a kit of two 512M x 64-bit (4GB) DDR3-1333 CL9 SDRAM ( Synchronous DRAM), 1Rx8 memory modules , based on eight 512M x 8-bit FBGA components per module. Total kit capacity is 8GB . The SPDs are programmed to JEDEC standard latency DDR3-1333 timing of 9-9-9 at 1.5V . Each 204-pin SODIMM uses gold contact fingers. The electrical and mechanical specifications are as follows:

SPECIFICATIONS
CL (IDD) 9 cycles
Row Cycle Time (tRCmin) 49.5ns (min.)
Refresh to Active / Refresh 260ns (min.)
Command Time (tRFCmin)
Row Active Time (tRASmin) 36ns (min.)
Maximum Operating Power 2,100 W * (per module)
UL Rating 94 V - 0
Operating Temperature 0o C to
85o C Storage Temperature -55o C to + 100o C
* Power will vary depending on the SDRAM used.

FEATURES
• JEDEC standard 1.5V (1.425V ~ 1.575V) Power Supply
• VDDQ = 1.5V (1.425V ~ 1.575V)
• 667MHz fCK for 1333Mb / sec / pin
• 8 independent internal bank
• Programmable CAS Latency: 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• Programmable CAS Write Latency (CWL) = 7 (DDR3-1333)
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
• Bi-directional Differential Data Strobe
• Internal (self) calibration: Internal self calibration through ZQ pin (RZQ: 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85 ° C, 3.9us at 85 ° C <TCASE <95 ° C
• Asynchronous Reset
• PCB: Height 1.18 ”(30mm), double sided component (Two-sided chips)